The data format of a ΔΣ-modulated high speed one-bit audio signal is of significantly high sampling frequency and of short data length, such as sampling frequency of 64 times 44.1 kHz and data length of one bit, as compared with that of a conventional digital audio signal, such as sampling frequency of 44.1 kHz and data length of 16 bits, and is characterized by broad transmittable frequency band. Although the ΔΣ-modulated signal is a one-bit signal, high dynamic range can be secured in audio frequency band which is low as compared with the over sampling frequency of 64 times. Taking advantage of the property, the ΔΣ-modulated signal is applicable to data recording and data transmission, keeping high sound quality.
A ΔΣ modulation circuit is not a particularly new technology, and is conventionally often used is an AD converter, etc. since it can be configured in the form of an IC properly and AD conversion with high accuracy can be realized with ease relatively.
A ΔΣ-modulated signal can be restored to an analog audio signal by causing the ΔΣ-modulated signal to pass through a simple analog low-pass filter.
In a ΔΣ-modulated signal, there exists the maximum amplitude level of representable audio frequency band. Thus, a large-level signal whose amplitude level surpasses the maximum amplitude level cannot be represented. Furthermore, when an overflowed signal, which is generated by adding two kinds of one-bit signals, is sent to a ΔΣ modulator of high order so as to obtain a one-bit signal, a signal processing circuit becomes unstable.
For example, when mixing one-bit signals, the amplitude level of a resultant output signal may surpass that of original signals, or surpass an amplitude level that can be represented by a one-bit signal. When converting such a large-level signal to a one-bit signal using a digital signal processing apparatus provided with a ΔΣ modulator of high order, it is necessary to perform limit processing for the amplitude level of audio frequency band using a limiter so as to prevent instability of a signal processing circuit.
FIG. 10 shows an example of a block diagram of a conventional digital signal processing apparatus 100. When adding two kinds of high speed one-bit signals A and B, generated through noise shaping, using an adder 101, the amplitude level of a resultant added output undesirably surpasses the maximum amplitude level of representable audio frequency band. So, the digital signal processing apparatus 100 performs limit processing for an audio frequency band signal being the added output.
Firstly, an FIR filter 102 detects audio frequency band. Secondly, an over level detector 103 detects an over level surpassing from a reference level. Then, the over level detector 103 sets thus detected over level to be of negative, and an adder 105 adds thus generated negative over level to the added output sent from the adder 101 which is delayed by a delay line 104. Thus, the over level of the audio frequency band is subtracted from the audio frequency band signal by the adder 105, suppressing the over level. Then, the audio frequency band signal which has its over level suppressed is sent to a ΔΣ modulator 106 to be a one-bit output signal.
The FIR filter 102, which has to remove quantization noise component concentrated at high range raised after undergoing noise shaping so as to detect signal component of audio frequency band, is a filter having steep attenuation property. The FIR filter 102 of steep attenuation property is undesirably enlarged in size since multipliers, etc. are used. Furthermore, in view of delay time brought about by the large-sized FIR filter 102, the delay line 104 has to set long delay time.